Testing of electronics

Welcome to the most comprehensive JTAG/boundary-scan tutorial. What is JTAG and how to make use of it. With the help of this page, we would like to give you a follow-up overview about testing electronics using the JTAG/boundary-scan technology.

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Electronics is everywhere – the world would no longer function without chips and circuit boards. (learn more about our story here) And once it is clear how important they are, it also becomes clear how dependent we are on their correct functioning. The proper functioning of electronics can be verified by means of a functional test. A board or system works if it functions after power, or does it? How or when do you know that every possibility has been tested, particularly if the board or system is more complex? And when a failure does occur, how do you then know the cause and location of the failure?

The growing complexity of modern systems has made functional test preparation a lengthy job, while the fault coverage of such test programs may remain unknown. Moreover, diagnosing faults found in functional testing can be very difficult and often requires highly skilled technicians in manufacturing.

Both issues can be addressed by the well-known divide and conquer strategy. Test smaller parts (sub-assemblies) first before using them in larger assemblies. By sub-dividing the problem, test preparation and diagnostics becomes better manageable. For this reason, printed circuit board assemblies (PCBA’s) are first tested individually before putting them in a system and performing a system level test.

However, the rapidly increasing complexity of Integrated Circuits (IC) made that PCBA’s became systems themselves causing the same type of problems with PCBA functional test as encountered at system-level; namely long test preparation times, uncertain fault coverage, and poor diagnostics.

To address this complexity problem at PCBA level a structural test called in-circuit testing (ICT) was developed. By providing direct electrical access to the components on a PCB via an electromechanical “bed-of-nails” fixture, it was possible to test for manufacturing faults. This technology was well suited for packages like dual-in-line packages (DIP), pin-grid arrays (PGA) and plated-through-hole PCB technology.

In today’s competitive and rapidly changing electronics market, the speed and effectiveness of product testing have a significant impact on your bottom line and time-to-market. The escalating complexity, speed, performance, and level of integration of today’s IC and systems designs are putting enormous pressure on designers of test systems, fixtures, and algorithms to up their game and find ever-more innovative means of shorter time to test to reduce overall cost.

Test equipment vendors are doing their best to supply the most advanced technology and equipment, but they too, are feeling the pressure to stay ahead of the curve.

Smaller device packages and increasing device complexity limit the test coverage and diagnostic capabilities of traditional test methods like in-circuit test (ICT), flying probe test (FPT) and functional circuit test (FCT). JTAG/boundary-scan was developed to overcome the limitations seen with traditional test methods, particularly in designs with high pin-count, fine-pitch devices.  JTAG test and in-system programming applications use the resources built into the chips on your boards and are complimentary to the traditional test methods.

A crucial factor for the product quality and reliability is the spectrum of faults that is covered by the various tests performed on the product. Four types of faults can be distinguished:

1. Design Faults

The product is not performing the function it was designed for. It is hard to model and to simulate all the possible design errors. No automatic test pattern generation can be done and no fault coverage can be given. The knowledge is in the head of the design engineer. Design verification and/or test equipment can acquire the measurement data for an adequate diagnosis, but the designer has to judge the measurement results. High observability and controllability of a design improves the quality of his or her judgement.

2. Manufacturing faults

Manufacturing faults can be modelled to a high degree of completion. Examples are opens, shorts, component assembly faults and component defects. Test patterns to detect these types of faults can easily be generated automatically, provided that physical test access to nodes on the unit under test is possible. With Boundary-scan testing manufacturing faults can be detected and eliminated, which results in a very high delivery quality. To optimize the production yield, designs should not only be well manufacturable, but should also be well ‘testable’.

3. Functional Faults

Functional faults are behavioral faults that result when one or more components are defective or do not perform entirely according to their specifications. Finding functional faults requires functional testing.

4. Reliability / Life Time Faults

A product may cease to function due to physical or human causes, such as abuse. Test patterns applied via boundary-scan for component and connectivity tests can detect these type of faults also.

Fault types can be categorized in two main groups: assembly faults and functional faults. Assembly faults are faults like incorrect components, missing components, loose solder contacts, loose wires, etc.. These are all faults in the structure of the PCBA or system and are therefore also referred to as structural faults.

Functional faults are behavioral faults that result when one or more components are defective or do not perform entirely according to their specifications. Of course functional faults also occur when structural faults are present.

Finding functional faults requires functional testing. And while also structural faults can be detected with functional testing more efficient ways exist to detect and locate these type of faults. When a fault is detected with a functional test a different behavior is found from what was expected. If both structural and functional faults can be present the incorrect behavior can be caused by either type of fault. This is the first problem to be solved. Then if it is a structural fault, you actually see the fault indirectly because you see the result of the fault, not the fault itself. Therefore it is generally difficult to pinpoint the actual cause of the failure and its location. Furthermore it is hard, or even impossible, to determine for a functional test if all possible structural faults will be detected. For these reasons it is desirable to separate between methods for detecting and locating structural faults and functional faults.

Finding structural faults (assembly faults) can be done in many different ways. Inspection techniques can be used or electrical testing, or both. With inspection methods the board is “looked” at/inspected by human eye or (automated) optical inspection techniques (AOI), or with X-ray. With electrical testing the presence of connections and devices is verified electrically.

Electrical tests with which you only test for the presence of the right structures are fast and simple compared to functional tests. With these structural tests diagnosis is direct because you actually “see” the fault directly. Not only is diagnosis direct, you can also generate structural tests automatically, and what’s more you can exactly determine the fault coverage of the structural tests.

While functional tests clearly are dependent on the functionality of the board being tested – the target board or Unit Under Test (UUT) – structural tests are totally independent of the UUT’s functionality.

For this reason structural testing became very popular over time and various automated structural test methods were respectively developed. This started with In-Circuit Testers (ICT). The biggest concern with ICTs are the relatively expensive fixtures. As an alternative for ICT, Manufacturing Defect Analyzers (MDA) were developed which need fixtures that are far less expensive than ICT. But MDA, like ICT still needs fixtures and fixtures are UUT specific. The problem of (the cost of) fixtures was addressed by Flying Probe Testers (FPT). An FPT does not need a fixture, but still requires physical access to the UUT via moving probes. All these tester types thus require physical access to the UUT via probes, something which becomes ever more difficult with smaller device packages and board dimensions. This reduces the test coverage and diagnostic capabilities of these traditional structural test systems. JTAG/boundary-scan was developed to overcome the access limitations of probes seen with traditional structural test methods, particularly in designs with high pin-count, fine-pitch devices.  JTAG test and in-system programming applications don’t need probes as they use the resources built into the chips on the boards and are complimentary to the traditional test methods.

Read the article why test from Electronic Engineering times

Printed Circuit Boards (PCBs) underpin all electronics hardware. Over the years, PCBs have become loaded with more components and hence have become increasingly complex and expensive. This is mainly caused by the ongoing miniaturization in electronics.

The trend in the electronics industry over the last 50 years has been one of continuous miniaturization, where more computing power is packed into ever-smaller footprints. At the integrated circuit level transistors are successively miniaturized and densities are increased over time in accordance with Moore’s law. This level of miniaturization has also happened at the PCB level.

Part of this miniaturization is driven by the developments in integrated circuit designs: As transistor densities increase, chip sizes have decreased, and the board size required for a given device is also allowed to decrease. The demand for even smaller boards continues and is driven by an expectation of greater functionality in a single device.

To exploit the miniaturization of electronic components at board and system level, PCB designs have to use fine-line techniques and chips in compact surface mount packages (SMDs).

But with newer fine-line PCBs and more complex array-style IC-packages, such as QFP, BGA, CSP, FCA, etc., with higher pin-counts and smaller pitches, test access with external probes has become severely limited. Fixturing technology could not keep up with the ever-decreasing dimensions of pins and pitches and the higher pin-counts of packages.

Early on, the industry anticipated these accessibility problems, and through a cooperative effort, the JTAG/boundary-scan method was developed and adopted in 1990 as the IEEE Standard 1149.1 Test Access Port (TAP) and Boundary-Scan Architecture, also known as the JTAG standard. The objective of this powerful standard was to overcome many of the drawbacks of the other test technologies.

Boundary-scan (also known as JTAG or IEEE Std 1149.1) is an electronic serial four (optionally five) pins JTAG interface that allows access to the special embedded logic on a great many of today’s ICs (chips). Learn more about Boundary-scan

When designing a circuit that can use JTAG/boundary-scan test techniques, there are some items that are mandatory, while others make the testing more effective or easier to accommodate. However, incorporating as many techniques as possible into the design will enable the best test to be undertaken to find the most problems during the development phase of the product as well as  during production and field test.

Multiple possibilities exist to address PCB testing and design to optimize the assembly process. When a test strategy is developed it is determined which test and inspection methods will be used and why. The goal of a test strategy is to maximize the fault coverage, but not always at all cost. First it is necessary to get a good understanding of the types of faults that need to be detected and which methods are available.

No single PCB testing system will meet the requirements of every manufacturing environment. Basically three different methods are available for the factory:

• Inspection techniques
• Structural Testing
• Functional testing

Together these three can be used to maximize the fault coverage such that no PCBA leaves the factory with a manufacturing defect or functional fault. While inspection is always used the question is whether testing should also be performed. With that not only comes the question which type of testing should be performed, but also who is responsible for testing and where should the tests be performed, at the factory or, in case of contract manufacturing (EMS or CM) at the OEM?

Many factors must be taken into account when developing a PCB testing strategy. It is essential to focus on the proper test procedure for a particular product, financial scenario, and quality and reliability perspective. All of these should be considered in combination with production volume and end-user market. The requirements for consumer electronics for example differ from those for medical equipment or aerospace and defense. Inspection techniques are generally considered as part of the assembly process and are therefore the responsibility of the factory. Logically inspection techniques are thus always found in a factory. As a minimum there is inspection by a person (human eye), while for higher volumes this inspection is mostly automated using AOI or X-Ray.

While structural testing, like inspection, looks for manufacturing defects it may be considered as the manufacturer’s responsibility. If structural tests are done, then based on the fault coverage of these tests, the factory can indicate how many faults can still be present in the PCBA’s it supplies. This is a valuable number that shows the assembly quality of the manufactured products. If a functional test is then considered the number will help to determine what the functional test should focus on. It will then also help to reduce the costs of functional testing while no complex fault diagnosis is needed to find manufacturing defects.

Functional testing depends on the functionality of the products something which is determined by the design and the parts used and is independent of the assembly process. If the design is correct and if all parts are correct, then the only faults in a PCBA can be assembly errors and inspection plus structural testing should be enough. Provided of course that the parts are not damaged during the assembly process, something which should be detected during inspection and/or structural testing. Functional testing is thus not considered as direct responsibility of the factory, but of course can be performed by the factory.

Traditional structural test equipment may be expensive and for that reason this equipment is not always available in a factory, specifically if lower volumes are produced. In that case only functional testing is used in addition to inspection.

With boundary-scan that changes. Not only does it solve the problem of fixturing, the boundary-scan equipment is also low-cost and therefore can already be used with very low production volumes. JTAG/boundary-scan can thus always be applied without much extra cost. From a test strategy point of view it now becomes very interesting because of the resulting paradigm shift.

If for economical reasons structural test was not used before it now all of a sudden becomes possible to use structural testing based on JTAG/boundary-scan. The option in this case is to use either a stand-alone boundary-scan station, or to use boundary-scan in combination with a functional test.

If structural test was already used before, boundary-scan can help to restore the fault coverage of structural test which was reduced by miniaturization (limited probe access). The options now are threefold: a) one can add JTAG/boundary-scan to the ICT, MDA or FPT that is already used, or b) a stand-alone JTAG/boundary-scan station can be used, or c) JTAG/boundary-scan can be combined with a functional test set-up.

Having separate stations means more board handling. This may add extra cost, but it gives maximum freedom and flexibility.  Combining JTAG/boundary-scan with other stations, either structural or a functional test set-up, on the other hand may cause extra technical complexity.

To ensure the quality and correct operation of electronic products you have to be able to test them both during R&D (design verification) and later in production (production testing). To make sure the required testing is possible, and preferably even easy to do, you have to take the testing requirements into account when the product is being developed. This is called design for testability or design for test (DFT).

Design For Test (DFT) assists the design engineer in creating highly testable products without incurring extra engineering time. Increase quality on all fronts:

• Know the testability of your designs; take corrective action prior to board layout.
• Verify correct PCB assembly at prototype stage and in production.
• Improve manufacturing operation with valuable process information reports.

Given these benefits, it is clear that every designer should apply DFT. It is of prime importance to understand the quality impact of all aspects of testing, including design for testability and fault coverage targets. Seen from the customer’s point of view testing  does not add functionality and thus no value to the product, however, testing does effect the products’ functioning. If DFT is applied, inherently the chance of failure is diminished and that does add value (read quality) to the product. It is therefore worthwhile to make testing an integral part of a design/manufacturing activity and consider it in the light of customer satisfaction. While it might seem that improving quality costs money, in the long term money is saved through higher yield and fewer customer returns. For this reason time has to be spent on component, board and system inspection, monitoring the manufacturing process for improvements and an overall analysis of the development and production cycle. The analysis may even include the field service costs.

Component selection for JTAG, boundary scan

In any design the choice of components can have a major impact on the overall concept for the item. This is true when considering using boundary-scan / JTAG techniques for testing a printed circuit board. It is important for a circuit that will be tested using boundary-scan that components that are used accommodate testing using this methodology.

• Choose boundary-scan compliant devices
• Avoid components with dual function connections
• Ensure all boundary-scan compliant devices support the required IEEE 1149.1 instructions
• Design the circuit for JTAG/boundary-scan

Once the required components have been chosen, it is necessary to ensure that the design of the circuit enables easy testing, and provides maximum access when using boundary scan / JTAG. There are a number of techniques available to ensure that maximum use can be made of IEEE 1149.1.

• Correct connection of JTAG signals
• Partition circuit according to component manufacturers

JTAG connector

One important aspect associated with any form of electronics test, and this includes JTAG/boundary scan is that of test access. This is obviously important in terms of choosing components and designing the circuit correctly. However physical access is equally important. To ensure that circuits can be tested easily, many boards include a JTAG connector specifically for test. This JTAG connector can be a very low cost item as it only needs to be used during the production and test phases of the product. However good reliable test access is very important. The JTAG connector can save time, especially if it provides very reliable performance where other methods may not be so reliable. Poor reliability can lead to many hours of lost time fault finding problems associated only with the test access. In view of this and the ease of performing tests, a JTAG connector can be a cost effective addition to a board in many cases. A JTAG connector should therefore be considered as one of the design considerations at the early stages of a product design.

As an electronic product moves through its life cycle, from development through prototyping to manufacturing and finally to the service and support phase, responsibility for the product also migrates through the organization. However, at the handover from one department or discipline to the next delays and disruptions can occur, brought on by a variety of issues.

One of these issues is the use of different test methods and tools among the various departments or disciplines. This means failures of correlation can occur putting stress on inter-department communications and relations.

If problems are not rapidly understood and resolved, vital aspects such as time-to-market, repair turnaround time, and product quality and reliability can become hard to control.

BOUNDARY-SCAN IN THE PRODUCT LIFE CYCLE

By providing a consistent inter-departmental, inter-disciplinary, approach Boundary-scan can help resolve the issues mentioned above. Furthermore, cost-savings and quality improvements invariably accompany these benefits.

JTAG/boundary-scan technology has proven to be particularly effective when implemented ‘corporately’ throughout the life-cycle of the product.

Using JTAG/boundary-scan testability and fault coverage analysis tools early in the product life cycle pays off in reduced time to market and improved product quality. The designer will know, prior to prototyping, the level of test coverage that will be attained with the product. If the coverage is deemed to be inadequate, the design can be modified and coverage re-examined, avoiding the delays that every subsequent process step would otherwise encounter. By adopting a policy in which the design phase includes DFT (Design for Test) analysis that meets coverage requirements, the organization will avoid wasted layout spins and prototype builds.

Testability as well as fault coverage data can be presented as color-coded schematics and/or in a spreadsheet format for quick and easy analysis. The design engineer can then assess coverage at the PCB level and, if deemed to be inadequate, the design can be modified and coverage re-examined. Trapping DFT (Design for Test) and DFM (Design for Manufacturing) issues early on avoids delays caused by design and layout re-spins.

Once the ‘paper’ design is complete prototypes are built that also require testing for manufacturing faults. Unlike structural test methods such as in-circuit testing, JTAG/boundary-scan testing requires minimal fixturing and can easily be applied on the designer’s bench or to small prototype runs. Screening for structural faults at this stage enables the designer to properly focus on design issues.

Specific JTAG/boundary-scan tools for debug allow easy access to device pins for electrical stimulus and sensing allowing users to ‘buzz out’ connections or build functional style tests in Python. Furthermore these tools provide a convenient means of programming (and re-programming) flash and logic elements on the board during firmware verification.

The ease with which boundary-scan applications can be developed means that design revisions can be quickly incorporated in the test and programming routines.

Discover here when Boundary-scan makes sense

JTAG/boundary-scan improves production test efficiency in several important ways.

1) Structural Test

Boundary-scan-based device interconnections tests can run at high speed and are capable of producing pin-level diagnostics. Fixturing for board test access can be dramatically simplified, if not eliminated entirely. Furthermore, the modular nature of JTAG/boundary-scan tools allow them to be combined with other structural test methods, such as in-circuit testing or flying probe, which may already be in use in the factory, or with functional test systems.

2) Functional Test

Boards with faults that are not detected by structural testing are said to “escape” to the functional test stage. Structural test escape faults can be detected by functional testing, but are not so easily diagnosed and corrected.

JTAG/boundary-scan tools can easily be integrated in, or combined with functional test systems. If structural testing is not done as a separate step in advance, adding JTAG/boundary-scan at the functional stage helps minimize the bone-pile by ensuring that no (or very few) manufacturing defects remain unresolved at this stage. Because of the precise diagnostics from boundary-scan, board repair is usually swift and requires only one action rather than several trial and error attempts to locate the faulty device/pin.

This precision has a positive impact on product quality, and reduction of product-to-market times. Savings can also result from reduced product handling, fewer test stations, less floor space, a reduction in training requirements, and use of a familiar, unified GUI to the operator.

3) Production programming

In-system device programming is another important aspect of PCBA production. JTAG/boundary-scan offers the opportunity to use the same tools for both testing and high-throughput in-system programming (ISP) of a range of device types (e.g. NOR, NAND and serial flash memories, programmable logic devices plus Micros and DSPs featuring embedded memory).

Programming is performed at an optimal point in the flow, and reprogramming (if required) can be performed easily without having to remove devices from the board. Savings result from reducing the number of tools in use and simplifying the process flow.

4) Environmental stress testing

Environmental stress testing (HASS and HALT) can be significantly enhanced using JTAG/boundary-scan. Because the target interface is implemented using a compact low-pin count cable, largely immune to interference, the test set-up is simple.

Furthermore, boundary-scan testing can be set to run continuously so that environmentally-induced failures can be detected and time-stamped for later diagnosis. Thus, intermittent faults which might occur only at elevated temperatures, for example, are captured, avoiding no fault-found situations and preventing costly escapes to the field.

5) System-level

JTAG/boundary-scan technology can be applied at system level for both test and in-system programming. This can be performed using either an external tester or by using an embedded JTAG controller. Commercial ICs for embedded JTAG control and bus ‘bridging’ are available that enable such boundary-scan control to be designed into the target system itself, which is then capable of ‘self-test’ application execution.

This type of advanced architecture is advantageous in maintaining test and programming access to complex systems such as those found in datacoms and military/aerospace applications.

Centralized as well as distributed repair facilities can use the same JTAG/boundary-scan based tests as the factory, helping to avoid correlation problems when analyzing test results.

Furthermore, because boundary-scan is simple to set-up and connect, the repair department can rapidly switch between target types and versions in high-mix situations.

Transitions of responsibility from one organization to the next are streamlined, inter-departmental communications are enhanced, and correlation problems are avoided by the use of a common test methodology.

If a product has been well planned, including observing the principles of design-for-testability, the enterprise will experience many, if not all, benefits of JTAG/boundary-scan during the entire lifecycle of the product, including service repair.

Click here to learn more about our service solutions for board repair and device programming

The global marketplace is constantly evolving. No other industry experiences more change than electronics. New technology becomes available at an alarming rate. In order to remain competitive in the electronics industry, electronics manufacturers must be able to keep up. Electronics companies of all shapes and sizes face quite some challenges.

Keeping up with increasing quality demands, to lower development costs, to lower the production costs, faster service repair times and better ease of use. Puts pressure on all the departments.

Quality improvement

Electronics manufacturers are urged to make new products with higher quality at lower costs in shorter time spans. Design For Test (DFT) for printed circuit boards is playing an important role in quality and is imperative to meet high quality and reliability objectives.

What can be done to make the high quality targets obtainable?

The only answer is DFT: Design For Test. Given this starting point, it is clear that every designer should apply DFT. It is of prime importance to understand the quality impact of all aspects of testing, including design for testability and fault coverage targets. Testing alone does NOT add functionality and thus no value to the product as seen from the customer’s point of view. But if DFT is applied, then inherently the chance of failure is diminished and that does add value (read quality) to the product. Thus testing must be advocated or even be made mandatory as an integral part of a design/manufacturing activity and should be considered in the light of customer satisfaction. While it might seem that improving quality costs money, in the long term money is saved through higher yield and fewer customer returns. For this reason time has to be spent on component, board and system inspection, monitoring the manufacturing process for improvements and an overall analysis of the development and production cycle. The analysis may even include the field service costs.

Lower development costs 

Testing is necessary to obtain the highest possible product quality. The costs of testing, however, should be low. This is true for the test costs incurred during production as well as for the costs to develop the tests. The amount spent on testing, and the related costs for fault diagnosis and repair, are determined by a product’s design and are thus set at the design phase.

The costs to develop the tests also depend on the product’s design. The better a design is testable, the lower its production test costs and the lower the costs to develop these tests. Hence Design For Test (DFT) is crucial in reducing the cost of test. Use of automated test generation tools keeps costs down and simplifies the development process.

Using JTAG/boundary-scan testability analysis tools early in the product cycle pays off in reduced time to market and improved product quality. The designer will know, prior to prototyping, the level of testablity of that will be attained for the product. If the testablity is deemed to be inadequate, the design can be modified and testablity re-examined, avoiding the delays that every subsequent process step would otherwise encounter. By adopting a policy in which the design phase must include DFT analysis that meets testablity requirements, the organization will avoid wasted layout spins and prototype builds.

Lower production costs 

Generate the best test strategy and choose the right tools to use in the production phase.

JTAG/boundary-scan improves production test efficiency in several important ways:

• Boundary-scan based device inter connections tests can run at high speed and are capable of producing pin-level diagnostics.
• Fixturing for board test access can be dramatically simplified, if not eliminated entirely.
• JTAG/boundary-scan can be used as independent station either stand-alone, or in-line.
• The modular nature of JTAG/boundary-scan tools allow them to be combined with other structural test methods, such as in-circuit testing or flying probe, which may already be in use in the factory.

Alternatively JTAG/boundary-scan tools may also be integrated in functional test stations. Boards with faults that are not detected by traditional structural testing are said to “escape” to the functional test stage.

Structural test escape faults are readily detected in traditional functional testing, but are not so easily diagnosed and corrected. Adding JTAG/boundary-scan at the functional stage helps minimize the bone-pile by ensuring that no (or very few) manufacturing defects remain unresolved at this stage. Because of the precise diagnostics from boundary-scan, board repair is usually swift and requires only one action rather than several trial and error attempts to locate the faulty device/pin.

This precision has a positive impact on product quality, and reduction of product to-market times. Savings can also result from reduced product handling, fewer test stations, less floor space, a reduction in training requirements, and use of a familiar, unified GUI for the operator.

Faster repair

The test plan for a product should cover the whole product life-cycle and include: prototype debugging, manufacturing tests and field service repairs. The tools that can be used to locate a problem on a failing Printed Circuit Board Assembly (PCBA) depend on whether design data of the board is available or not, and whether test programs for the board already exist. In all circumstances boundary-scan technology can help to shorten repair times in (field) service and can also be used to-reprogram parts for system upgrades.

What can be done to shorten repair times?

Nobody wants to wait a long time for the repair of a product. JTAG/boundary-scan with ProVision can help to shorten repair times even if no, or only limited, design data is available. It can also be used to re-program parts for system upgrades. Centralized as well as distributed repair facilities can benefit from the same JTAG/boundary-scan-based tests as the factory, helping to quickly analyze test results. Furthermore, because boundary-scan is simple to set-up and connect, the repair department can rapidly switch between target types and versions in high-mix situations.

In summary, if the product has been well planned and incorporates the basic design for test measures required, the enterprise will experience many benefits. Transitions of responsibility from one organization to the next are streamlined, inter- departmental communications are enhanced, and alignment problems are avoided by the use of a common test methodology.

Ease of use 

The purpose of any tool is to make a task easier and quicker. It makes sense therefore for tools to be developed by the same people who also use them on a daily basis, allowing intuitive features to be introduced dynamically and progressively as the needs arrive.

Test tools should be reliable and help you with your daily challenges. They should ease your workload, not complicate it.

Some key requirements might be:

• Easy to learn, with minimal knowledge
• Simple to use with application wizards
• Seamless integration
• And easy to pick-up again – after an absence

However, ease of use is not easy to define, as it reaches beyond the daily work of the average user. And, inspite of the fact testing is just one small part of the process, it is still an essential one. As an electronic product moves through its life-cycle, from development through prototyping to manufacturing and finally to the service and support phase, responsibility for the product also migrates through the organization. However, problems can occur at the departmental boundaries where different tools and philosophies can be in use.

If problems are not rapidly understood and resolved, vital aspects such as time-tomarket, repair turnaround time, and product quality and reliability can escalate beyond acceptable limits.

In today’s world, of course, we cannot live without electronics. We expect it to function normally. But of course this is not self-evident. In order to achieve reliable electronics, it is mandatory that they are tested.

Whether it is in aviation, automotive, defense, transport or health care. it is obviously important that the importance of testing is included in the design, production and service phase. But also, of course, in the production of electronics itself as well as in automation of production worldwide, not to mention in the world of data, telecom and consumer electronics.

Read more about the impact of JTAG / Boundary-scan in different markets here.