Live Webinars

Assessing PCBA ‘testability’ and JTAG ‘accessibility’ from schematic data

An introduction to JTAG/Boundary-scan fault coverage analysisFeaturing:

* Free and low-cost tools for exposing accessibility

* Advanced tools for precise net-level analysis

* Presentation of fault coverage results

Fault coverage analysis is an important step in the design-for-test (DFT)process which is also an integral part of of the design teams workload. Early feedback of coverage issues at the schematic entry stage can avoid costly re-spins at later stages which lengthen time-to market which in turn can massively reduce profitability over a product’s life.