The implementation of Design-for-Manufacturing (DfM) alongside the use of high quality assembly and inspection equipment minimizes the chance for assembly errors. In spite of this, however, assembly errors do occur and PCBAs must be tested to detect these errors in an effort to achieve PCBAs with zero defects.

A test sequence (also known as TestPlan) is used to execute individual actions (step types) such as power switching, structural or functional tests, limit compares or device programming actions in a logical order.

Various parameters determine the type of test and programming hardware that fits best. Such parameters include performance, form factor, integration possibilities with other test stations already in use, etc.

In production, when devices are programmed as part of the board configuration process, a complete range of different devices and device types must be supported. For efficiency reasons such programming should ideally be undertaken using the same hardware as used for testing

Complete your production line with JTAG test solutions

Design-for-Test (DfT) rules serve to optimize the test process for detecting assembly errors. Modern designs rely on JTAG boundary-scan for testing. Boundary-scan in a device gives access to its pins irrespective of the device package and allows for a maximum fault coverage. With our Testability analysis you can determine which percentage of a design can be tested with boundary-scan. Our booklet “Board DfT Guidelines” helps you to optimize the boundary-scan testability of your design.

Test Development

Different tests are developed to achieve the maximum fault coverage. Boundary-scan tests such as interconnect test, pull-up, pull-down resistor tests, memory cluster tests and tests of random logic devices can all be generated automatically with ProVision. With the powerful python language tests can be added for those parts of the circuit for which automatic test generation is not possible, for example sequential circuitry, ADC’s and DAC’s. Whether your design consists of a single board or comprises of multiple boards any configuration can be handled within ProVision. When a set of tests has been generated the fault coverage of this set can be calculated and compared against the testability of the design to see if additional tests are needed. Finally automatic test sequencing makes execution of the tests a simple push the button action. Possibilities to combine the various tests in a single sequence complete the ProVision development environment.

Run-time Solutions

At run-time the test sequence is executed to test the entire board. JTAG Technologies’ run-time solutions may be stand-alone or may be part of your total test solution (JTAG Inside). Production Integration Packages are available for LabVIEW, LabWindows, TestStand, C, C++, C#, .NET, Visual Basic, ATEasy. Also certified packages (Symphony products) are available for in-circuit testers and flying probe testers from Agilent, Teradyne, Digital Test, Seica, Spea, Cobham, Takaya, …


Diagnostics software analyzes the detected faults and reports the cause of the faults and the nets and pins involved. With Visualizer the location of a fault can be highlighted on the layout and schematic diagram making it simple for factory repair technicians to locate the fault on the board.

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We have been able to solve thousands of board test problems by actively engaging with our customers. Once you become a JTAG Technologies customer you are an integral part of our business with free access to our world-wide support network.