Software

While Buzz allows the user to sample activity on boundary-scan pins and test continuity of nets across a circuit board, BuzzPlus extends its capability with a unique ‘seek and discover’ mode that effectively learns the network of nodes for a specified net connection.

JTAG Live Buzz is automatically included for free with this product.

AutoBuzz is a totally unique new tool that effectively learns a ‘connectivity signature’ of all boundary-scan parts within a design from only the BSDL models of those parts. By expanding on the seek and discover mode of BuzzPlus, AutoBuzz automatically gathers the circuit data of a known good board which is then saved as a reference. Compare mode is then used to check the known good reference against the faulty circuit.

JTAG Live Buzz is automatically included for free with this product.

Clip is the vector-based upgrade for creating and saving board-level tests. It features unlimited pattern depth and bit width. Clip’s logic analyzer-like waveform display shows you what’s happening with the signals on your board. Use Clip’s “Compare On” and “Set Breakpoint” options for complete execution control.

JTAG Live Buzz is automatically included for free with this product.

Script uses the open-source Python language to provide a powerful command and control structure to drive and sense boundary-scan I/O pins for ‘cluster’ testing.

Using Script, you’ll create Python code to verify operation of non-boundary-scan logic. LEDS and mixed signal devices. By means of high-level routines that can be embedded in a Python program, Script drives and senses values on pins or groups of pins defined as variables. The built-in JTAGLive Python editor simplifies preparation of the sequences to perform tests and collect results. Creating test modules in Script promotes device orientated testing and hence re-use of test code.

Using Python open source means that thousands of additional libraries can be obtained from the established user community.

JTAG Live Buzz is automatically included for free with this product.

CoreCommander routines take control of key processor core (e.g. ARM, PPC, X-scale, Cortex etc.) functions using the built-in emulation/debug functions found in today’s RISC and DSP cores. They have been developed to speed-up board testing and debug by enabling kernel-centric testing.

CoreCommander offer two modes of operation:

Interactive – offering direct control of the core via a GUI or;

Python embedded* – where controls can be scripted into a complete program.

* requires JTAGLIve Script or JFT in ProVision

JTAG Live Studio is your complete JTAG/boundary-scan solution for testing, debugging and programming your designs. Based on the JTAG Live platform that includes an automated scan path builder, Studio includes JTAG Live Buzz/BuzzPlus, WatchPlus, AutoBuzz, Clip, Script, JAM, STAPL and SVF players PLUS a JTAG Live controller.

With the latest version of AutoBuzz, interconnections can be tested using a comparison learned data from either a known good board or a CAD-derived netlist. Create reusable cluster tests and flash programming actions in Python using Script. Include IC ‘kernel-centric’ tests by adding low-cost CoreCommander options that can control IC cores and/or link to FPGA gate array fabric.

Get a free JTAG Maps for Altium license

JTAG Maps is an extension to Altium Designer EDA system that allows the user/engineer to quickly assess the capabilities of the JTAG devices on their design. Until now engineers could often spend hours highlighting the boundary-scan nets of a design manually to determine fault coverage. Today the free JTAG Maps for Altium application does all this and more, freeing-up valuable time, allowing a more thorough DfT and speeding time to market.

With or without boundary-scan models – boundary-scan device models (BSDLs) are pivotal to any JTAG/boundary-scan process as they indicate precisely which pins can be controlled or observed by JTAG/boundary-scan. However JTAG Maps for Altium can work with or without BSDL models and includes an ‘assume scan covered’ option. This feature can also be used to indicate fault coverage to a connector (set to assume scan covered) or to highlight the differences in fault coverage between two equivalent parts. JTAG Maps for Altium will also automatically trace the TAPs (Test Access Ports) from schematic data. The JTAG control nets associated with the TAPs will be highlighted separately from the ‘testable’ nets.

Import as well as export – while most users will want to simply use the coverage report that JTAG Maps for Altium can provide, it is possible to import a more accurate picture. After exporting a JTAG ProVision project, the data can be sent for further analysis. A simple text-based message file containing full fault-coverage information can then be read back into JTAG Maps for display/highlighting.

Optional Developer Tools– for engineers wishing to apply JTAG/Boundary-scan tests directly onto their design JTAG Technologies can offer two further options, JTAG Live for low cost functional testing with boundary-scan and JTAG ProVision a full-blown automated test program generation and device programming system

JTAG Provision is a Boundary-scan (IEEE Std1149.x) test and programming application development suite that is used through a product’s life-cycle to generate boundary-scan tests and in-system programming applications for assembled PCBs and systems. This professional, integrated development environment (IDE), JTAG software tool is fully automated and supports the import of design data from over 40 different EDA and CAD/CAM systems. Other key data inputs are JTAG device BSDL (description) models and a large, well-maintained model library describing thousands of non-JTAG devices including memories, bus logic, and other active and passive parts.

How it works

Using ProVision boundary-scan software suite you can rapidly generate a wide range of test and programming applications from a project database built-up from the inputs above. All applications can be optimized, validated and run within the ProVision environment prior to delivery of finalized test sequences to the manufacturing and/or testing facility. ProVision also comes with a built-in boundary-scan test sequencer for production ready test plans.

ProVision’s development features are tightly integrated with JTAG Technologies’ advanced test coverage analysis tool and also with JTAG Visualizer graphical display system for design schematics and layouts. You can use these professional JTAG tools to quickly assess the thoroughness of the test during development and to make improvements prior to release.

The PMBus is simply a protocol that defines communication between power conversion devices, using SMBus (System Management Bus) as the physical layer. SMBus is in turn based on I2C with additional fault tolerant and error correction features.

In a standard PMBus set-up a separate interface header or a dedicated master devices must be employed to communicate with PMBus slaves. Using PMBusProg however allows the user to harness the power of the existing JTAG/boundary-scan driver/sensor pins and use these to synthesise a PMBus master.

JTAG Functional Test system (JFT) is a simple to use DLL Application Program Interface (API) with a series of software modules that support boundary-scan test (testing single pin nets) and programming activities under Python, National Instruments’ LabVIEW and Microsoft .NET framework. Using JFT users can create JTAG/boundary-scan test application scripts, LabVIEW (Boundary-scan VI’s). .Net or programs for PCB assemblies and systems that control individual driver/sensor pins, groups of pins declared as variables or register bits.

These applications are typically used to test logic devices or mixed signal clusters and can also be transformed into re-usable test ‘modules’. Pairing JFT with JTAG CoreCommander emulative test modules gives an effective, low-cost system for performing tests through embedded device peripherals (ADCs, Memory Controllers etc..)

JTAG Visualizer is an advanced schematic and layout viewer (and data management system) for PCBs that accepts data from a variety of CAD, CAM and EDA tools. Visualizer integrates seamlessly with the JTAG Technologies family of boundary-scan products such as the ProVision application development platform.

In design, Visualizer provides DfT (design for test) feedback to the user by enabling a graphical view of fault coverage on their design. In manufacture and test, Visualizer can be used to highlight faulty nets (short circuits, opens, stuck-ats etc.) in both layout and schematics views. Visualizer also supports cross-probing between schematics and layout as well as a layout underside ‘flip’ view mode. By invoking JTAG Tehnologies Buzz (WatchPlus) within Visualizer users can also monitor pin activity graphically using JTAG ‘sample’ operation mode.

CTPG_M and a supporting CoreCommander module, that allows communication with your device’s internal IP, is all that is required to build high-speed memory and connectivity cluster tests in ProVision.

Led by an increasing desire to test DDRx and other memory types at true system speed JTAG Technologies developed the CoreCommander Test Program Generator (CTPG_M) for ProVision. CTPG_M overcomes many of the issues associated with testing of memory clusters using conventional boundary-scan (IEEE Std 1149.1) techniques, including: the lack of a boundary-scan register (generally in smaller CPUs); insufficient access to all memory signals (most notably synchronous memory clocks); and also the inability to test using write/read cycles running at full system speed.

By using the power of the embedded emulation/debug logic and the embedded memory controller, tests can be developed automatically to overcome the issues listed above, allowing faster and more effective testing. The system utilises existing debug/emulation support options built-into microprocessors or downloaded into FPGAs (see CoreCommander). CTPG_M is available as an option to JTAG ProVision software (CD 23 and above)and is fully compatible with all JTAG Technologies tester hardware and diagnostics system – allowing pin-level diagnostic reports to be produced for test engineers, production technicians etc.. Test results can thus also be viewed in layout or schematic views provided by JTAG Technologies Visualizer tools.

JTAG Technologies’ ‘Classic’ Production Stand-Alone package (PSA) has, for many years, been the standard execution system operated in CEM and OEM factories when an independent boundary-scan test and/or device programming station is required. Introduced in the late 1990s to support applications generated by our ‘Classic’ development tools, several thousand PSA systems are still in use today. For new projects however ProVision Platform run-time system is usually recommended

Using PSA, test engineers can build sequences of applications in the built-in AEX (Application EXecutive) manager using if, then, else, and goto capabilities. Sequence builders can also include additional capabilities through DOS/Win command line calls, create serial number logged test reports, export tests results to a database etc.. PSA includes drivers for all JTAG Technologies controller hardware past and present.

JTAG/Boundary-scan embedded flash programming by JTAG Technologies offers a range of options that can be used by engineers to improve their device programming facilities without additional unnecessary hardware. Our solutions for programming embedded (flash) memories of Microprocessors and DSPs are also known as SCIP (Serial Controlled IC Programmer) modules. The family comprises a wide range of software modules that can be used by test and production engineers to broaden the scope of their in-system device programming facilities without adding much or anything in the way of additional interface hardware.

While many devices have standardised on JTAG (IEEE Std 1149.1) as hardware interface for programming and testing there has been little standardisation in the way internal (flash) memories are programmed. The use of ‘Private’ instructions and non-standard state machine implementations have meant that some JTAG/boundary-scan tool-sets are unable to cope with the variety of devices that now use JTAG as their programming interface. Furthermore there exists a secondary layer of devices that use other, often lower pin count, interfaces to support their programming. Examples of these alternative interfaces are BDM, SPI, SWD (ARM Serial Wire Debug) etc.. JTAG Technologies SCIP modules sometimes using protocol adapters overcome these obstacles.

While a full ProVision system allows development and execution of integrated JTAG/boundary-scan test and programming software applications, it is possible to use the same familiar user interface in a reduced functionality version within production and manufacturing. ‘ProVision Platform’ is available for test execution only, flash in-system programming (ISP) only, PLD ISP only, or of course any combination of these.

Each ProVision Platform licence includes the capability to import ProVision development archives, execute applications and review test results in the familiar TTR (Truth Table Report) format and, optionally BSD (diagnotics) or Visualizer (graphical viewer). The system also includes the built-in boundary-scan test sequencer, our acclaimed AEX (Application EXecutive) manager,  for application sequencing which itself includes if, then, else and goto structures for building more complex test and programming sequences as well as report generation and results storage by serial number.

JTAG Technologies Production Integration Packages allow users to execute the full range of JTAG board test and programming applications from a ‘third party’ environment. In addition to the test oriented front-ends such as National Instruments’ LabView and TestStand, JTAG Technologies also provides support for for Microsoft .NET and others.

For C/C++ there is PIP/DLL, for .NET framework systems such as Visual C, Visual Basic etc. we offer PIP/.NET. There’s also a DOS/Win command line execution package – PIP/EXE. Each PIP package includes full capability to load and launch applications to test and program boards on our DataBlaster, Explorer or new MIOS (mixed-signal) IEEE Std. 1149.x boundary-scan controllers.

As a long-standing alliance partner with National Instruments, JTAG Technologies is able to offer a wide range of high-level integration options for the National Instruments’ control and test executive packages – TestStand, LabView and LabWindows/CVi. As part of our PIP (Production Integration Packages) family our National Instruments support options have enabled our customers to seamlessly and reliably integrate high-quality boundary-scan applications into their test and device programming systems for almost 20 years.

BSD Test Diagnostics software can be added to either developer or factory run-time systems to further improve the location of faults such as net bridges (short-circuits), open pins, open nets and even ‘twisted’ connections that can occur within cable assemblies. BSD test diagnostics reports any faults in a verbose English language statement with pin-level information included and can easily interpret multiple fault conditions.

Additional capability can be added to the test diagnostics package through the use of fault dictionaries that can be created for functional logic (cluster tests). These can help pin-point faults that may occur deep within a functional logic block. Test diagnostics is the ideal complement to the TTR (Truth Table Reporter) system that is included in our ProVision developer suite and also PIPs (Production Integration Packages). BSD test diagnostics is a standard feature of the Symphony family of run-time systems that have been developed to allow JTAG Technologies applications to be executed on third party ATE systems.