Tell me about JTAG/boundary-scan
Boundary-scan, also known as JTAG or IEEE Std. 1149.1, is a serial interface that gives access to the special embedded logic built-in
into many of today’s integrated circuits (ICs). JTAG/boundary-scan provides a quick and easy method for testing electronic Printed Circuit Board Assemblies or PCBAs for manufacturing faults. It is also widely used for programming ICs such as cPLDs, FPGAs and flash memories on the circuit boards in production as well as after product manufacture if software/firmware updates are needed.
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Tell me about test strategy
How do you (as OEM) keep the quality and costs of your (outsourced) production under control in today’s miniaturization of electronics? Testing today’s electronics, where not all nets can be provided with test points, is becoming increasingly difficult or even impossible using traditional test methods. But the production chain also raises new questions. How do you keep track of what is being produced for you and what can you do, for example, to relieve your EMS partner and find solutions together?
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Reducing the PCB Bone Pile: Optimizing Test Strategy
We are often not aware, how to reduce the PCB bone pile. The answer is : optimizing the test strategy. Having worked within an established company in the world of PCB assembly testing for many years we still come across companies (OEMs) who will tell us, “We don’t need to test, because we demand that the contract manufacturer (CM) only send us 100 percent working boards.” But, demanding and receiving are two different matters. No one can totally accomplish this, and even if they could, what does it actually cost? There’s an old saying in the engineering industry: “If it hasn’t been tested, then it doesn’t work” — rather, you should assume it doesn’t work. Most people however assume the opposite, and that is where the problems start. So the question remains how to optimze your test strategy.
The many faces of the JTAG interface port
For many the term “JTAG” is still a point of confusion; for some engineers it is a device-programming port while for others it is for plugging in a microprocessor emulator or debugger, whereas, in fact, it was originally devised for neither. JTAG is an acronym of “Joint Test Action Group”, and initially the aim was to provide an alternative system to aid circuit board assembly testing, i.e. for detecting and diagnosing assembly errors such as solder shorts, lifted pins and missing/badly-placed components. The Group in JTAG refers to a small number of test professionals who met over a period of four to five years from 1985, to devise a scheme to embed test circuitry into digital devices with the aim of assisting in the structural test of PCBA(s). Similar schemes had been developed unilaterally by device manufacturers, such as IBM’s LSSD, but at that point there was no interoperability standard that all vendors could comply to. By 1990, the JTAG system, also known as “boundary-scan”, was officially an IEEE standard number 1149.1.
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