To be able to use the JTAG/boundary-scan technology, a jtag interface must be present. There are several different interfaces available, depending on the application and usage.
A JTAG interface (TAP) is a special interface added to a chip. Depending on the version of JTAG/boundary-scan, two, four, or five pins are added. The four and five pin interfaces are designed so that multiple chips on a board can have their JTAG lines daisy-chained together if specific conditions are met.
The two pin interface is designed so that multiple chips can be connected in a star topology. In either case a test probe need only connect to a single “JTAG port” (TAP or test access port) to have access to all chips on a circuit board.
See our Interfaces
Happy to serve you!
We have been able to solve thousands of board test problems by actively engaging with our customers. Once you become a JTAG Technologies customer you are an integral part of our business with free access to our world-wide support network.