JTAG Technologies has been an active supporter and participant in the development of industry standards. In fact, we led the very first working group in the late 1980's whose efforts led to the ground-breaking IEEE 1149.1 specification. This standard defines JTAG boundary-scan which was first released in 1990 and has been updated three times since then - the latest update happing in 2013 - see IEEE 1149.1-2013 . The standard defines test logic for inclusion within integrated circuits which can be used at the board-level to conduct precise structural testing and in-system programming.
Since the release of the IEEE 1149.1 specification, four other standards have been developed, each building on the 'dot1' base and extending it for specific purposes. IEEE 1149.4, analog boundary-scan, released in 2000 and IEEE 1149.6, released in 2003 and often called ac-EXTEST, expand boundary-scan's testing capability beyond the original digital realm. The third standard, IEEE 1532, sets up a common descriptive format for programmable devices like PLDs and FPGAs so they can be more conveniently configured using boundary-scan. The latest addition to the family is IEEE 1149.7, a superset of 1149.1 and fully compliant with it, directed at reducing the pincount and enhancing the functionality of the link between 1149.1 test systems and targets.
Additionally there are a number of ongoing efforts to extend JTAG boundary-scan even further. Among these are: IEEE P1149.8 (also referred to as A-toggle), IEEE P1149.10 (a high-speed packetised communications variant) IEEE 1581 (aka SCITT, a test extension for memory devices), IEEE P1687 (aka iJTAG, an extended internal JTAG architecture devised to access built-in device-level test instruments) and SJTAG (an extension for system-level testing). JTAG Technologies will work closely with all of these efforts to maintain that state-of-the-art edge.
For more information please visit the official IEEE website or any of these pages: