JTAG Technologies

We are boundary scan.

Nearly 25 years old, and still growing stronger: JTAG Boundary-Scan IEEE 1149.1

The IEEE 1149.1 standard has stood the test of time. Since 1990 it has served as the embedded test technology in thousands of ICs, providing the test and programming backbone to countless board and system designs. Starting as a digital PCB test mechanism devised to overcome the anticipated lack of test access in high-density electronics, the "dot1" standard has been revised twice though the underlying structure has remained intact. The IEEE standard defines the Test Access Port (TAP), a sequential state machine called the TAP controller that's implemented in the IC, the Instruction Register, and a number of Data Registers.

Associated with the specification is the Boundary-scan Descriptive Language (BSDL), IEEE Std 1149.1b which defines the syntax used to describe the implementation of the logic at chip level. The industry's toughest syntax checkers are built-in to JTAG Technologies development tools, and our BSDL Verifier goes a step further: it compares an actual chip with the BSDL file to make sure the two are consistent. The BSDL Verifier will even generate a BSDL file from a sample chip through a process of 'reverse engineering'.



Further standards: