Application Notes

Take advantage of existing experience through JTAG Technologies Application Notes, descriptions of the use of boundary-scan to solve practical, real-world problems. To download an application note, you have to have a valid software maintenance contract. Download links are provided to obtain PDFs on the following subjects:

AN-1    How to implement boundary-scan compliant multi-chip modules for test and ISP applications

AN-2    Programming Serial PROMs using JTAG 'Classic' software

AN-2.1 Serial Memory Device Programming

AN-3    Using multiple controllers for gang programming

AN-4    Multiplexing data and address lines in flash applications

AN-5    Use of multiple scan chain configurations

AN-6    DDR SDRAM interconnect testing using JTAG 'Classic' software

AN-7    Testing free-running clocks

AN-8    Using Boundary-scan Fault Coverage Examiner to determine testability and actual realized fault coverage

AN-9    SVF Programming the Altera Stratix II Design Security Key

AN-10   SVF 32 bit stream alignment for Xilinx Virtex and Spartan 3 devices

AN-11   RESET statement in SVF files used for PLD programming

AN-12   Improving flash programming performance with empty-area skipping

AN-13   Version 3.0 Programming Altera active-serial configuration flash devices. Including Cyclone III Family support and EPCS128 support. Additional software is required, a set of prepared SVF files and flash programming template files is included with this document.

AN-14 Parallel Programming of Serial Memory Devices

AN-15 Accessing Altera Virtual JTAG Interface (VJI) functions

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