Nearly 20 years old, and still growing stronger: JTAG Boundary-Scan IEEE 1149.1

The IEEE 1149.1 standard has stood the test of time.  It's served as the embedded test technology in thousands of ICs, provides the test and programming backbone of uncounted system designs, and continues to expand its utility into new areas. Starting in 1990 as a digital test mechanism to overcome the anticipated lack of access associated with high-density electronics, the "dot1" standard has been revised twice though the underlying structure has remained intact. The specification defines the Test Access Port (TAP), a sequential state machine called the TAP controller that's implemented in the IC, the Instruction Register, and a number of Data Registers.

Associated with the specification is the Boundary-scan Descriptive Language (BSDL) which defines the syntax used to describe the implementation in the chip and the operations to be performed. The industry's toughest syntax checkers are built-in to JTAG Technologies development tools, and our BSDL Verifier goes a step further:  it compares an actual chip with the BSDL file to make sure the two are consistent. The BSDL Verifier will even generate a BSDL file from a chip.

Want more detail? Download a copy of the informative BSDL Verifier brochure.

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Tutorials:

Click this picture for an audio-visual boundary scan tutorial for JTAG / boundary scan implementation at IC level.

Click this picture for an audio-visual boundary scan tutorial for PCB boundary scan applications.