JTAG Boundary-Scan, firmly based on IEEE standards

JTAG Technologies has been an active supporter and participant in the development of industry standards.  In fact, we led the very first working group in the late 1980's whose efforts led to the ground-breaking IEEE 1149.1 specification. This standard defines JTAG boundary-scan which was first released in 1990 and has been updated twice since then. The standard defines test logic for inclusion within integrated circuits which can be used at the board level to conduct precise structural testing and in-system programming.

Since the release of the IEEE 1149.1 specification, three other standards have been developed, each building on the "dot1" base and extending it for specific purposes.

IEEE 1149.4, analog boundary-scan, released in 2000 and IEEE 1149.6, often called ac-EXTEST, released in 2003, expand boundary-scan's testing capability beyond the original digital realm. 

The third standard, IEEE 1532, sets up a common descriptive format for programmable devices like PLDs and FPGAs so they can be more conveniently configured using boundary-scan.

And there are a number of ongoing efforts to extend JTAG boundary-scan even further. Among these are:

• IEEE 1149.7, often referred to as reduced-pin-count JTAG

• P1581, a test extension for memory devices

• SJTAG, an extension for system-level testing

JTAG Technologies will work closely with all of these efforts to maintain that state-of-the-art edge. For more information please visit the official IEEE website.